RESUMO
Performance limitations of currently employed four-level pulse amplitude modulation links and high power consumption of digital signal processing (DSP)-based coherent links for further increase in capacity create an urgent demand for low-power coherent solutions for short-reach data center interconnects. We propose a low-power coherent receiver with analog domain processing for a self-homodyne link. To validate the proposed scheme, a 10 GBd polarization multiplexed carrier-based self-homodyne quadrature phase-shift keying system with a constant modulus algorithm-based equalizer chip is experimentally demonstrated. Also, energy consumption per bit estimates show that the proposed approach results in significant power reduction in comparison with conventional DSP-based solutions.
